MIT/Lincoln Labs CCID20 W94C2 CCD Test Results

This phase 2 MIT/Lincoln Labs 2Kx4K CCD has more problems than many CCID20s. A summary report is available. Noteworthy points about this CCD include:

Bad "brickwall" pattern. We're calling this the type-3 brickwall.
Lower than normal serial CTE (0.999948).
A line of pixels show up in charge pumping tests.

Original postscript files are available from our anonymous ftp server and these provide better resolution and clarity than is usually possible on a web page. Here are a few figures to illustrate device highlights:

"Brick wall" pattern: The brick wall pattern on this device is much worse than most and has a characteristic pattern we call type-3. The QE variations are sensitive to both wavelength and temperature. As detailed in the report and shown in this image, peak-to-valley variations is at least 70% at 4000A .
Serial CTE: CTE measurements show lower than normal serial CTE.
Charge traps: Charge pumping reveals a line of bad pixels which have trouble transferring charge at a low level.
Surface plot: Very nice surface flatness.

Serial CTE as measured with Fe⁵⁵ is show here. Readout was through the left or B amplifier. CTE was about 0.999948 per pixel. As this plot shows, about 10% of the charge is left behind after 2048 transfers. Parallel CTE was much better, at about 0.999985 per pixel, or 6% loss after 4096 transfers.

This plot shows the location of charge traps revealed by charge pumping. There is a large group of traps near the serial register on the right or A amplifier side of the device.

The surface profile was measured using the UCO/Lick surface flatness machine. Peak-to-valley the surface varies by no more than about 6 micometers.

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