MIT/Lincoln Labs CCID20 W67C2 CCD Test Results
This is a high resistivity, thinned, backside MIT/Lincoln
Labs 2Kx4K CCD. It is very similar to other high resistivity CCID20s tested
at UCO/Lick.
A summary report
is available. Noteworthy points about this CCD include:
- CTE. Near perfect CTE is
achieved using the serial and parallel clocks which generate low spurious
charge. This is typical of Lincoln CCDs.
Original postscript files are available from our anonymous
ftp server and these provide better resolution and clarity than is
usually possible on a web page. There are also additional postscript files
showing CTE measurements, fringing, and the brick-wall pattern. Check the
INDEX
file for a description of what the other files contain. Here are a few
figures to illustrate device highlights:
- QE curve
- This is a pretty typical QE curve for the high resistivity
CCID20s. Good red response is achieved by the 40 µm thick epi.
- Serial CTE
- Near perfect CTE is achieved by the Lincoln CCD design.
- Surface plot
- Hasn't been measured yet.
- Brick wall
- This is the pattern which results from the incomplete
backside laser anneal. The change in sensitivity was measured from -40°C
to -110°C.
- Long Dark
- This 1000s dark at -136°C was obtained after the
CCD was repaired. The brick wall pattern shows up faintly in the dark.
The raw data file is available via the ftp server.
- Fringing
- This 9000Å fringing pattern is seen in many CCID20s.
This plot shows the QE measurements
made at about -125°C.
The Lincoln CCID20 design
produces excellent charge transfer efficiency. This plot shows a test of
serial CTE using Fe55 xrays.
No surface contour images
yet...
The data for this curve
was obtained by taking a flat field image at each of the indicated temperatures
and measuring the amplitude of the quantum efficiency variations. The percents
shown are derived by taking a single row cut through the image and computing
a percentage as (MAX-MIN)/MEAN. Obviously this emphasizes maximum variations
and different results will be obtained if a different row is selected.
But the general trend is clear: To reduce the amplitude of the brick wall
QE variations, operate the CCD at the highest practical temperature.
The dark current was
found to rise rather rapidly, doubling every 3.2 degrees. This rapid rate
of increase is probably due to surface states since the CCD can not be
operated in MPP mode. Note that we typically run the parallel clocks down
to only -6v, so we are not even running in partial-inversion mode.
This 9000Å
fringe pattern is seen in many CCID20s. There is a circular pattern which
is apparently centered on the wafer and a more random pattern on top of
that. The circular pattern is only a fraction of a percent in amplitude
and in this CCD the random pattern has about a 10% amplitude, which is
quite reasonable. This image, showing the central section of the CCD where
the illumination was most uniform, was obtained after the CCD was repaired.
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